<?xml version="1.0"?>
<rss version="2.0">
   <channel>
      <title>Computer Architecture_Revision Notes by Coleman Chong</title>
      <link>https://padlet.com/chong_lee_soong5_1/computer_architecture</link>
      <description>Physical components of a computer</description>
      <language>en-us</language>
      <pubDate>2019-09-17 14:40:17 UTC</pubDate>
      <lastBuildDate>2024-01-31 08:29:00 UTC</lastBuildDate>
      <webMaster>hello@padlet.com</webMaster>
      <image>
         <url></url>
      </image>
      <item>
         <title>Input, process, output and storage device (Jayden)</title>
         <author>chong_lee_soong5_1</author>
         <link>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/387957131</link>
         <description><![CDATA[<p>Write down the definition of input, process and output</p>]]></description>
         <enclosure url="" />
         <pubDate>2019-09-23 05:45:09 UTC</pubDate>
         <guid>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/387957131</guid>
      </item>
      <item>
         <title>Input and Output Interfaces Connectors- (Tristan)</title>
         <author>chong_lee_soong5_1</author>
         <link>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/387957134</link>
         <description><![CDATA[]]></description>
         <enclosure url="" />
         <pubDate>2019-09-23 05:45:10 UTC</pubDate>
         <guid>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/387957134</guid>
      </item>
      <item>
         <title>Primary Storage - (Shao Hong)</title>
         <author>chong_lee_soong5_1</author>
         <link>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/387959517</link>
         <description><![CDATA[<p>RAM</p><p><br></p><p><br></p><p>ROM</p><p><br></p><p><br></p>]]></description>
         <enclosure url="" />
         <pubDate>2019-09-23 05:57:12 UTC</pubDate>
         <guid>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/387959517</guid>
      </item>
      <item>
         <title>Data Bus and Address Bus - (Travis)</title>
         <author>chong_lee_soong5_1</author>
         <link>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/387960006</link>
         <description><![CDATA[]]></description>
         <enclosure url="" />
         <pubDate>2019-09-23 05:59:55 UTC</pubDate>
         <guid>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/387960006</guid>
      </item>
      <item>
         <title>Secondary Storage - 3 types of secondary storage devices - (Nawfal)</title>
         <author>chong_lee_soong5_1</author>
         <link>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/387962519</link>
         <description><![CDATA[<p><strong>Magnetic storage</strong>: </p><p><strong>Adv:</strong>  </p><p><strong>Disadv:</strong> </p><p><strong>Eg:</strong> </p><p><br/></p><p><strong>Optical storage: </strong></p><p><strong>Adv:</strong> </p><p><strong>Disadv:</strong> </p><p><strong>Eg:</strong> </p><p><br/></p><p><strong>Solid state storage:</strong></p><p><strong>Adv:</strong> </p><p><strong>Disadv:</strong> </p><p><strong>Eg:</strong> </p>]]></description>
         <enclosure url="" />
         <pubDate>2019-09-23 06:11:53 UTC</pubDate>
         <guid>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/387962519</guid>
      </item>
      <item>
         <title>Consideration on what to choose for secondary storage - (Ming Zhe)</title>
         <author>chong_lee_soong5_1</author>
         <link>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/387967388</link>
         <description><![CDATA[<p>List down all the consideration of what storage device to choose and give the reasons.</p>]]></description>
         <enclosure url="" />
         <pubDate>2019-09-23 06:31:23 UTC</pubDate>
         <guid>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/387967388</guid>
      </item>
      <item>
         <title></title>
         <author>chong_lee_soong5_1</author>
         <link>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/743039960</link>
         <description><![CDATA[]]></description>
         <enclosure url="https://padlet-uploads.storage.googleapis.com/43632496/629c6e43620cce15873c703d656b88bc/Data_Address_Bus.JPG" />
         <pubDate>2020-09-14 06:32:32 UTC</pubDate>
         <guid>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/743039960</guid>
      </item>
      <item>
         <title></title>
         <author>chong_lee_soong5_1</author>
         <link>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/750849724</link>
         <description><![CDATA[]]></description>
         <enclosure url="https://padlet-uploads.storage.googleapis.com/43632496/aca91ba6e62e363247324a9bab1b5f89/Picture1.png" />
         <pubDate>2020-09-16 08:11:30 UTC</pubDate>
         <guid>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/750849724</guid>
      </item>
      <item>
         <title></title>
         <author>chong_lee_soong5_1</author>
         <link>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/750908004</link>
         <description><![CDATA[]]></description>
         <enclosure url="https://padlet-uploads.storage.googleapis.com/43632496/22c753199681ce4a1c2f5b812dcc6824/computer_desktop_parts_250x250.jpg" />
         <pubDate>2020-09-16 08:49:19 UTC</pubDate>
         <guid>https://padlet.com/chong_lee_soong5_1/computer_architecture/wish/750908004</guid>
      </item>
   </channel>
</rss>
