# data[].attributes.body
WiFi - local area network following international standards, connect and communicated without a physical connection.
Wireless Network Adaptor - Allows computer to access the network
Wireless Access Point - Allows the physical network to access the 'wireless' network (ie does the broadcasting)
WPA/WPA2 - WiFi protected access (encryption)
SSID Broadcast - shows the name of the network for people to try and connect to - if you don't know it you can't (easily) try and connect to it!
MAC White List - list of hardware IDs that are allowed to connect to the network.
CSMA/CA - Carrier Sense Multiple Access with Collision Avoidance

# data[].attributes.body
Peer-to-peer - every node is equal status - easy to setup but limited centralisation,  impacts on management, security, backup etc.
Client-Server - Central dedicated servers provide a service when requested by clients. Allows centralisation of management, security, backups, etc.

# data[].attributes.body
Physical star - each device connected via a central hub. Data is sent to the hub and broadcast (hub) or directed (switch) to the other node(s). Simple to manipulate, requires planning, expensive to implement.
Logical bus - not a physical layout but the idea that data is passed from node to node until it reaches the required node.

# data[].attributes.body
Baud rate - rate at which information is transferred - multiple bits per signal.
Bit rate - rate of bits transferred per signal - multiplication of baud rate
Bandwidth - the range of frequencies (each of which can carry one or more bits) on a channel down which data can be sent.
Latency - The time delay between an action being instantiated (caused) and its effect being seen - NOT the same as lag.
Protocol - an agreed set of rules followed by two or more devices when communicating.

# data[].attributes.body
Serial - one bit at a time.
Parallel - many bits at a time
Serial requires less hardware, less media, cheaper, simpler. Less likely to suffer from skew, cross-talk or de-synchronisation.
Synchronous - waits for acknowledgement, needs start and stop bits. Synchronised by external clock.
Asynchronous - Sends data and then is able to do other things whilst waiting for replies etc.
See https://en.wikipedia.org/wiki/Comparison_of_synchronous_and_asynchronous_signalling for advantages/ disadvantages.
Start bit - dictates the start of a new byte of data
Stop bit - dictates that the byte of data being transmitted is finished.

# data[].attributes.body
What could be the impact of this on other people - in law - on people of certain ages, groups, ethnicity, society as a hole? Is this a good thing? Not ALL impacts are negative! If it is negative, what could be done to counteract it?

# data[].attributes.body
FETCH:
o contents of PC transferred to MAR
o address bus used to transfer this address to main memory
o contents of addressed memory location moved into the MBR
o transfer of content used the data bus
o increment PC
o transfer content of MBR to CIR.
DECODE:
o decode instruction held by the CIR
o the control unit decodes the instruction
o instruction split into opcode and operand.
EXECUTE:
o if necessary, data is fetched
o the opcode identifies the instruction to execute / operation to perform
o execute instruction by relevant part of processor
o result stored in accumulator

# data[].attributes.body
Needed for low cost/large capacity storage, non-volatile.
Know differences/pros/cons/ how they work - hard disk, optical disk (CD/DVD), SSD (not hybrid!) - see youtube videos.

CD - 700Mb - cheap - slow - can be damaged
DVD - 4-8-16Gb - cheap - slow - can be damaged
USB - up to 512Gb - relatively cheap - robust - medium speed
HDD - up to 4Tb - medium cost - fast - not robust

# data[].attributes.body
Barcode reader, Digital Camera, Laser printer, RFID (see youtube videos)

# data[].attributes.body
Multiple cores - multiple calculations at once
Cache memory - less time to retrieve regularly used instructions/data
Clock speed - more instructions carried out in a given period of time
Word length - Allows access to more RAM and larger/higher precision numbers in fewer clock cycles
Address bus width - allows more memory locations to be accessed
Data bus width - allows more data to be transferred in one go

# data[].attributes.body
machine code and assembly code, where the code is written in instructions using hexadecimal or binary. It is the language that the computer can recognize and execute programs instantly.

# data[].attributes.body
Interrupt is a hardware call to tell the CPU that something urgent needs doing. Stores current instruction pointer (on stack) and status register then loads new instruction etc from interrupt. When done all is restored from stack and memory.

# data[].attributes.body
Immediate - operand is the datum
Direct - operand is the memory or register address of the datum

# data[].attributes.body
Instruction set - list of instructions that the processor understands - specific to processor family.
OPCODE (the thing to do)
OPERAND(S) (One more more things it can do it on/with)

# data[].attributes.body
See 6.2 from http://filestore.aqa.org.uk/resources/computing/AQA-75162-SMS.PDF

# data[].attributes.body
ALU - performs logical and arithmetic operations
Control Unit - Instructs components how to respond to instructions
Clock - issues a tick to ensure all components act in synchronisation
General Purpose Registers - Very fast memory located close to the CPU for general use.
Dedicated Registers - Program counter - keeps track of the next instruction to access/execute.
Current Instruction Register - Holds the current instruction to be executed.
Memory Address Register - holds the address of memory to be accessed.
Memory Buffer Register - collates data/instruction from memory until all available to be put in to CIR.
Status Register - keeps track of the state of the register and individual bits are set/read - eg 'carry' flag

# data[].attributes.body
Machine code instructions stored in main memory and fetched and executed serially by processor

# data[].attributes.body
This connects networks that use the same link of layer protocols

# data[].attributes.body
Allows a person to access the internet.

# data[].attributes.body
This is a collection of web pages that all have hyperlinks to other pages. The web pages that are structured and formatted by HTML and are styler by using CSS

# data[].attributes.body
Processor - does the calculations
Main memory - Holds data and instructions
Address bus - carries the address of data to be retrieved or stored
Data bus - carries the data between RAM and CPU
Control bus - carries instructions from CU to RAM, CPU etc
I/O controllers - interface between CPU and I/O devices.

# data[].attributes.body
This connects a network that uses different link layer protocols.

# data[].attributes.body
A global network o computers and network computers which all have a unique IP addresses and use TCP/IP.

# data[].attributes.body
Unless you're testing a thought out - don't hand it in!

# data[].attributes.body
Open and click the pictures

# data[].attributes.body
Data has to be obtained lawfully and fairly
Data has to be accurate and up to date
Data has to be within the rights of the person you're getting the data about
Data cannot be kept for a longer amount than needed

# data[].attributes.body
Annulment Law :
A . 0 = 0    A variable AND’ed with 0 is always equal to 0.

A + 1 = 1    A variable OR’ed with 1 is always equal to 1.

Identity Law:
A + 0 = A   A variable OR’ed with 0 is always equal to the variable.

A . 1 = A    A variable AND’ed with 1 is always equal to the variable.

Idempotent Law:
A + A = A    A variable OR’ed with itself is always equal to the variable.

A . A = A    A variable AND’ed with itself is always equal to the variable.

Complement Law:
A . NOT A = 0    A variable AND’ed with its complement is always equal to 0.

A + NOT A = 1    A variable OR’ed with its complement is always equal to 1.

Commutative Law:
A . B = B . A    The order in which two variables are AND’ed makes no difference.

A + B = B + A    The order in which two variables are OR’ed makes no difference.

Double Negation Law:
NOT !A = A     A double complement of a variable is always equal to the variable.

Distributive Law:
A(B + C) = A.B + A.C         (OR Distributive Law)

A + B.C = (A + B).(A + C)  (AND Distributive Law)

# data[].attributes.body
Employer:
Enployees have to be trained to use the equipment correctly.
Employees have to take regular breaks or regular changes in activity.
Employees have to take regular eye appointments and get glasses if needed.
Enployee:
Ask employer about problems that occur.
Uses equipment in a way that they're trained to use them.
Manufacturer:
Screens don't flicker, and the height is adjustable.
Keyboards have a matt surface to reduce glare.

# data[].attributes.body
Assembler - from assembly code mnemonics to object code
Compiler - source code to object code
Interpreter - line by line interpretation and execution
Byte code (intermediate) - closer to assembly/object but not specific to a processor family - uses a VM

# data[].attributes.body
LL - machine code + assembly (1:1)
HL - imperative (many:1)

# data[].attributes.body
Creates a virtual machine
Hides the complexities
Resource managements (memory, CPU, I/O...)

# data[].attributes.body
OS - provides a virtual machine (abstracts away from the HW)
Utility - manages the system (eg AV, defrag)
Library - eg windows libraries - can be used by multiple SW
Translators (compiler, interpreter, assembler)

# data[].attributes.body
clock speed is the frequency of the computer, which is shown in hertz (Hz). Usually shown using megahertz (MHz) or gigahertz (GHz) and this determins the speed that everything gets executed in. This is due to it being the amount of cycles within a second.

# data[].attributes.body
DML - Do on a SECTION at a time if needed - Choose sections mathematically.
Invert whole lot, invert each half, change symbol. Do DML from outside inwards
Make sure you can expand - and make - brackets
Remember the identities

# data[].attributes.body
System = controls the way the system works
Application - for 'doing' things

# data[].attributes.body
00101101
00011001
__________
01000110

1011
1000
_____
10011

01110010
00011111
__________
10010001

# data[].attributes.body
HW - Physical equip
SW - Instructions that tell the HW what to do.

# data[].attributes.body
Adds a set shift (A shift 3 = D), opposite to uncipher. Easily cracked using brute force or patterns. Can have variable shift for more complexity.

# data[].attributes.body
RLE - Run length encoding - eg 111100110111 would be 3x1, 2x0, 2x1, 1x0, 3x1

# data[].attributes.body
Von Neumann:
Computer has a single storage memory system to store data and execute programs.
Processor needs two clock cycles to create an instruction. Pipelining the instructions isn't possible using this architecture. This means it can only execute one instruction at a time.
Within the first clock cycle, the processor will get the instruction from the memory and decode it. the next one the data required is taken from the memory. For every instruction this is repeated, and this is why it needs 2 cycles to complete an instruction.
Harvard:
Computer has two seperate memories, one for storing data, and one for storing programs.
Processor can complete an instruction within one cycle using pipelining strategies.
Within the first stage of the pipeline, the instruction needs to be executed can be taken from program memory. Within the second stage of the pipeline, data is taken from the data memory using the decoded instruction or address.
Most of the modern computing architectures are based on Harvard's Architecure, but the pipeling stages varies between them.

# data[].attributes.body
Digital = data, 1s/0s, Analogue = continuous signal.
ADC and DAC
Bitmap size = width + height + colour depth (+ metadata)
Colour depth - use binary TOTAL rule - 2 bits = 4 colours, 3 bits = 8 colours.
Sound - size = samples * resolution * seconds (bits) / 8 for bytes.
Nyquist = sample at double the maximum frequency so as not to lose quality

# data[].attributes.body
Parity - counts the number of 1s and makes MSB up to be odd or even depending on type. Odd number of errors only. no correction.
Majority vote - sends each bit 3 times and uses majority, has correction.
Check digits are a mathematical calculation.

# data[].attributes.body
8 bits = MAX 255, TOTAL 256
Stick to ISO - 1000 = kilo, mega, etc, no 1024!
Unsigned binary = normal, positives only. 2's Complement = pos/neg - first bit is the sign bit (1 = negative)
Add and Multiply
Fixed point - start at 1 to left of point and 1/2 at right of point

# data[].attributes.body
Always go decimal -> binary -> hexadecimal and vice versa, don't skip!
from binary, split into nibbles, 0-9 = 0-9, 10-15 = A-F, then join together.
Hex - saves space on SCREEN and REDUCES MISTAKES

# data[].attributes.body
ℕ = Natural numbers including 0 (0,1,2,3...)
ℤ = Integers (-3,-2,-1,0,1,2,3...)
ℚ = Rational numbers - fractions (1/2, 1/4, 7/8...)
Irrational numbers - cannot be written as a fraction - √2
ℝ = Real numbers - all real world quantities
Ordinal numbers - positions in a set (1st, 2nd, 3rd...)